The quest to develop larger and larger semiconductors of the dynamic random access memory (DRAM) type is a well-known goal. The industry has steadily progressed from DRAMs of the 16K type, shown in U.S. Pat. No. 4,081,701 issued to White, McAdams and Redwine, and the 64K type, shown in U.S. Pat. No. 4,055,444 issued to Rao, to DRAMs of the 1M type, as described in U.S. Pat. No. 4,658,377 issued to McElroy. DRAMs of the 4M type are now being produced. Production plans for 16M DRAMs of submicron technology now exist and experimentation of 64M DRAMs has begun. One factor furthering the development of larger DRAMs is the reduction in memory cell geometries as illustrated in U.S. Pat. No. 4,240,092 to Kuo (a planar capacitor cell), and as illustrated in U.S. Pat. No. 4,721,987 to Baglee et al, (a trench capacitor cell).
Modern fabrication of VLSI devices like DRAMs makes wide use of deposited films on semiconductor wafers. Deposited films have many uses, such as conducting regions within the device, electrical insulation between metals, and protection from the environment. One of the materials most often deposited is polycrystalline silicon. Among other uses, it may be used as the gate electrode material in MOS devices, as a conducting material for multilevel metallization, and as a contact material for devices with shallow junctions. Deposition gases may be pyrolyzed in a low pressure chemical vapor deposition, LPCVD, reactor to form doped silicon films. U.S. Pat. No. 4,877,753, issued Oct. 31, 1989, assigned to Texas Instruments Incorporated and incorporated herein by reference discloses in-situ doping of polysilicon using tertiary butyl phosphine. The copending and coassigned patent application of coinventor Tang filed Dec. 1, 1989 entitled "Method and Apparatus for In-Situ Doping of Deposited Silicon", Ser. No. 07/444,900, incorporated herein by reference, discloses using deposition gases of silane SiH.sub.4 and tertiary butyl phosphine, TBP, (C.sub.4 H.sub.11)P in a LPCVD reactor to form doped amorphous films. LPCVD techniques allow for potential advantages in uniform step coverage, precise control of composition and structure, low temperature processing, fast deposition rates, high throughput, and low processing costs. The copending and coassigned application of the inventor herein and of Tang filed Oct. 31, 1990 entitled "A Vertical LPCVD Reactor", U.S. Pat. No. 5,076,206 incorporated herein by reference discloses an improved LPCVD vertical reactor used to form doped polysilicon films.
As trench capacitor cell DRAMs move into the 16M and 64M size, the aspect ratios of the trenches (the trench depth divided by the trench width) become large as trench widths decrease to submicron levels. In such devices, new processes are needed for forming in-situ doped silicon films. The films must be not only uniform and defect free, but also highly conformal. Resistivity variations should be minimal. The process should also allow sufficient throughput of wafers.
Accordingly, it is the object of this invention to provide a method of forming in-situ doped silicon films with improvements in conformality and resistivity.
It is a further object of this invention to provide such a method that yields uniform films with reduced defects.
It is a further object of this invention to provide such a method that is suitable for high volume processing of semiconductor wafers.
Other objects and advantages of this invention will be apparent to those of ordinary skill in the art having reference to this specification together with the drawings.